Testing the DIP switch inputs with the test EPROM

Steps

• During the I/O test watch U4 port B, which echoes the inputs. Port A inputs come through buffers Z13 and Z14.
• Set all 32 DIP switches off: PB0-PB7 should stay still at 0 V. A pulsing line points at a bad gate in Z13 or Z14 (often blown by playfield matrix shorts).
• Turn DIP 1 on: PB7 should start pulsing. DIP 2 drives PB6, DIP 3 PB5 and so on.
• DIPs 9 to 32 should have no effect here; if one does, check bank select chips Z33 (74154) and Z15 (7432).
• If an output ignores its switch, check the DIP switch itself (often worn or corroded), output buffers Z11 and Z12, input buffers Z13/Z14, Z15/Z33 and finally the RIOT.
• Z11 can be pulled to see if it is jamming a line; Z12 cannot, as later boards also use it as an address buffer. A chip that is too hot to touch is a likely culprit.

Systems

• Gottlieb System 80
• Gottlieb System 80A
• Gottlieb System 80B

Related tips

• System 80 DIP switches 25 to 32
• System 80 DIP switches 17 to 24: game play
• Reading the System 80 CPU DIP switches
• System 80 DIP switches 1 to 16: coins and credits
• System 80 ignores the DIP switch settings
• Replacing U2 and U3 with one 2764 EPROM
• Test EPROM stalls at the switch matrix RIOT (U4)
• Ways to fit EPROMs at U2/U3

Source: Gottlieb System 80 Test EPROM V3.2 (February 2015), Pinitech